VLSI Physical Design Engineer
Fremont, CA 
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Posted 24 days ago
Job Description
About our group:

The VLSI team at Seagate delivers state of the art System-on-Chip ASICs, which are used in Seagate storage products - hard disk drives, solid state drives, and storage systems. We design and implement Seagate's SoCs from initial concept and architecture, through layout and tapeout for delivery to the foundry. Our teams include Systems and IP Architecture, Analog Mixed-Signal Design, Digital Design and Verification, Physical Design, SoC Package Design, and Test Engineering.

Our Read Channel Digital IP team designs high-speed signal processing IP, in collaboration with other IP teams, for integration into Seagate's SoCs for HDDs. We design SOC for many Seagate storage products. You will be working in a world-class team to build our next generation SOC with advanced technologies such as Multi-Actuator and HAMR (Heat Assisted Magnetic Recording). You will take part in developing advanced DSP system utilizing state-of-the-art data recovery algorithm, using some of the most advanced silicon process technologies.

About the role - you will:

  • Work on one of the most advanced IPs to complete physical layout from netlist handover.
  • Develop and own physical design implementation on advance technology nodes by performing:
  • Floor-planning and cell/macro placement
  • Power distribution and clock tree planning
  • Signal planning, routing and optimization
  • Physical verification such as DRC/LVS/EM/IR flow
  • Power/Leakage/Area optimization
  • Resolve design and flow issues related to tools and methodology. Improve and optimize existing flow and processes.
  • Interact with team members locally and remotely in multiple locations around the world
  • Collaborate with other Seagate IP and SoC integration teams as our read channel IP is developed and integrated
About you:

  • Love to be challenged and at the forefront of technical innovation
  • Enjoy collaborating with team members who have a wide range of expertise and experience
  • Self-driven to work independently from a high level project definition
  • Look forward to asking technical questions of anyone in the team
  • Ready to learn new concepts and tools to grow your skills!
Your experience includes:

  • Bachelor's degree in Electrical Engineering or equivalent similar experience.
  • 5+ years experience in physical design. Taken macros or chip top from netlist to GDSII release.
  • Understanding of RTL2GDSII flow and design tapeouts in advance semiconductor process technologies.
  • Experience with low power implementation, timing constraints and optimization, resolving congestion and flow/tools related issues.
  • Experience working with EDA tools like DC/Genus, ICC2/Innovus, Primetime, Redhawk, Calibre, ICV, etc.
Location:

Our Gold LEED-certified Fremont product-design campus drives innovation, bringing together a diverse set of engineering, design, operations, support and administrative teams. The site is equipped with state-of-the-art clean room and lab space. On-site social activities are popular, including our annual BBQ, ice cream social, and holiday events. Wellness programs, gaming rooms and the on-site fitness center help round out and balance your Seagate work-life experience, along with opportunities to give back to our local community.

Location: Fremont, USA, Research Center
Travel: None


Seagate Technology is committed to equal opportunity in employment and welcomes applications from all sections of the community, irrespective of sex, marital status, religious affiliation, age, disability, veteran status, or ethnic origin

 

Job Summary
Start Date
As soon as possible
Employment Term and Type
Regular, Full Time
Required Education
Bachelor's Degree
Required Experience
5+ years
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